NARROW CHANNEL Si-MOSFETs FOR ELECTRON TRANSPORT STUDIES
نویسندگان
چکیده
We have fabricated narrow channel Si-MOSFETs for electron transport studies at low temperature. The fabrication process combines optical lithography for large structures and high resolution e-beam lithography for narrow gates. The smallest working devices have a 0.14 pm wide gate. This paper reports the fabrication process and gives some examples of the quantum transport phenomena observed in these devices.
منابع مشابه
Investigation of the electron transport and electrostatics of nanoscale strained Si/Si/Ge heterostructure MOSFETs
This thesis presents work aimed at investigating the possible benefit of strained-Si/SiGe heterostructure MOSFETs designed for nanoscale (sub-50-nm) gate lengths with the aid of device fabrication and electrical measurements combined with computer simulation. MOSFET devices fabricated on bulk-Si material are scaled in order to achieve gains in performance and integration. However, as device dim...
متن کاملA Monte Carlo study on the electron-transport properties of high-performance strained-Si on relaxed Si1-xGex channel MOSFETs
We have studied the electron-transport properties of strained-Si on relaxed Si12xGex channel MOSFETs using a Monte Carlo simulator adapted to account for this new heterostructure. The low-longitudinal field as well as the steadyand nonsteady-state high-longitudinal field transport regimes have been described in depth to better understand the basic transport mechanisms that give rise to the perf...
متن کاملHigh Mobility Strained Si/SiGe Heterostructure MOSFETs
Strained Siand SiGe-based heterostructure MOSFETs grown on relaxed SiGe virtual substrates exhibit dramatic electron and hole mobility enhancements over bulk Si, making them promising candidates for next generation CMOS devices. The most heavily investigated heterostructures consist of a single strained Si layer grown upon a relaxed SiGe substrate. While this configuration offers significant pe...
متن کاملMOSFET Channel Engineering using Strained Si, SiGe, and Ge Channels
Biaxial tensile strained Si grown on SiGe virtual substrates will be incorporated into future generations of CMOS technology due to the lack of performance increase with scaling. Compressively strained Ge-rich alloys with high hole mobilities can also be grown on relaxed SiGe. We review progress in strained Si and dual channel heterostructures, and also introduce high hole mobility digital allo...
متن کاملGate-All-Around Silicon Nanowire MOSFETs: Top-down Fabrication and Transport Enhancement Techniques
Scaling MOSFETs beyond 15 nm gate lengths is extremely challenging using a planar device architecture due to the stringent criteria required for the transistor switching. The top-down fabricated, gate-all-around architecture with a Si nanowire channel is a promising candidate for future technology generations. The gate-all-around geometry enhances the electrostatic control and hence gate length...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 2002